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08-12-2022, 04:59 AM
(This post was last modified: 08-12-2022, 05:00 AM by mkjohn.)
I didn't use any, as not sure what to use. Can you attach a tool to your reply to do the bios dump?
Is this useful for your question:
HWiNFO64 Version 7.26-4800
Central Processor(s) ------------------------------------------------------
[CPU Unit Count]
Number Of Processor Packages (Physical): 1
Number Of Processor Cores: 8
Number Of Logical Processors: 16
Intel Core i9-9880H -------------------------------------------------------
[General Information]
Processor Name: Intel Core i9-9880H
Original Processor Frequency: 2300.0 MHz
Original Processor Frequency [MHz]: 2300
CPU ID: 000906ED
CPU Brand Name: Intel® Core i9-9880H CPU @ 2.30GHz
CPU Vendor: GenuineIntel
CPU Stepping: R0
CPU Code Name: Coffee Lake-H
CPU Technology: 14 nm
CPU QDF: QRZR, QS0Q (QS)
CPU Thermal Design Power (TDP): 45.0 W
CPU Power Limits (Max): Power = Unlimited, Time = Unlimited
CPU Power Limit 1 (Long Duration)/Processor Base Power (PBP): (60.00 W) (28.00 sec) [Unlocked]
CPU Power Limit 2 (Short Duration)/Maximum Turbo Power (MTP): (75.00 W) (2.44 ms) [Unlocked]
Configurable TDP Level 1 (Down): 35.00 W (Unlimited range), 1900 MHz
Current Configurable TDP Level: Nominal (Legacy) [Unlocked]
CPU Max. Junction Temperature (Tj,max): 100 °C
CPU Type: Engineering Sample
CPU Platform: BGA1440
Microcode Update Revision: D2
Number of CPU Cores: 8
Number of Logical CPUs: 16
[Operating Points]
CPU MFM (Low Power): 800.0 MHz = 8 x 100.0 MHz
CPU LFM (Minimum): 800.0 MHz = 8 x 100.0 MHz
CPU HFM (Base): 2300.0 MHz = 23 x 100.0 MHz
CPU Turbo Max: 4800.0 MHz = 48 x 100.0 MHz [Unlocked]
Turbo Ratio Limits - IA/SSE: 48x (1-2c), 47x (3c), 46x (4c), 45x (5c), 44x (6c), 43x (7c), 41x (8c)
Turbo Ratio Limits - AVX2, Resolved: 48x (1-2c), 47x (3c), 46x (4c), 45x (5c), 44x (6c), 43x (7c), 41x (8c)
CPU Current: 2194.6 MHz = 22 x 99.8 MHz @ 0.8125 V
LLC/Ring Maximum: 4300.0 MHz = 43.00 x 100.0 MHz
LLC/Ring Current: 1895.4 MHz = 19.00 x 99.8 MHz
System Agent Current: 997.6 MHz = 10.00 x 99.8 MHz
CPU Bus Type: Intel Direct Media Interface (DMI) v3.0
Maximum DMI Link Speed: 8.0 GT/s
Current DMI Link Speed: 8.0 GT/s
Ring to Core Offset: Enabled
[IA Overclocking]
Voltage Offset: Supported
Voltage Override: Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: 48x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
IccMax: 140.00 A
[GT (Slice) Overclocking]
Voltage Offset: Supported
Voltage Override: Supported
Ratio Overclocking: Supported
Fused Ratio Limit: 60x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
IccMax: 32.00 A
[CLR (CBo/LLC/Ring) Overclocking]
Voltage Offset: Supported
Voltage Override: Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: 43x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
IccMax: 140.00 A
[GT (Unslice) Overclocking]
Voltage Offset: Supported
Voltage Override: Supported
Ratio Overclocking: Supported
Fused Ratio Limit: 60x
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
IccMax: 32.00 A
[Uncore/SA Overclocking]
Voltage Offset: Supported
Voltage Override: Not Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: N/A
OC Ratio Limit: N/A
Voltage Mode: Interpolative
Voltage Offset: 0 mV
IccMax: 20.00 A
IA Domain Loadline (AC/DC): 1.800 / 1.800 mOhm
GT Domain Loadline (AC/DC): 3.000 / 3.000 mOhm
[Cache and TLB]
L1 Cache: Instruction: 8 x 32 KBytes, Data: 8 x 32 KBytes
L2 Cache: Integrated: 8 x 256 KBytes
L3 Cache: 16 MBytes
Instruction TLB: 2MB/4MB Pages, Fully associative, 8 entries
Data TLB: 4 KB Pages, 4-way set associative, 64 entries
[Standard Feature Flags]
FPU on Chip Present
Enhanced Virtual-86 Mode Present
I/O Breakpoints Present
Page Size Extensions Present
Time Stamp Counter Present
Pentium-style Model Specific Registers Present
Physical Address Extension Present
Machine Check Exception Present
CMPXCHG8B Instruction Present
APIC On Chip / PGE (AMD) Present
Fast System Call Present
Memory Type Range Registers Present
Page Global Feature Present
Machine Check Architecture Present
CMOV Instruction Present
Page Attribute Table Present
36-bit Page Size Extensions Present
Processor Number Not Present
CLFLUSH Instruction Present
Debug Trace and EMON Store Present
Internal ACPI Support Present
MMX Technology Present
Fast FP Save/Restore (IA MMX-2) Present
Streaming SIMD Extensions Present
Streaming SIMD Extensions 2 Present
Self-Snoop Present
Multi-Threading Capable Present
Automatic Clock Control Present
IA-64 Processor Not Present
Signal Break on FERR Present
Virtual Machine Extensions (VMX) Present
Safer Mode Extensions (Intel TXT) Present
Streaming SIMD Extensions 3 Present
Supplemental Streaming SIMD Extensions 3 Present
Streaming SIMD Extensions 4.1 Present
Streaming SIMD Extensions 4.2 Present
AVX Support Present
Fused Multiply Add (FMA) Present
Carryless Multiplication (PCLMULQDQ)/GFMUL Present
CMPXCHG16B Support Present
MOVBE Instruction Present
POPCNT Instruction Present
XSAVE/XRSTOR/XSETBV/XGETBV Instructions Present
XGETBV/XSETBV OS Enabled Present
Float16 Instructions Present
AES Cryptography Support Present
Random Number Read Instruction (RDRAND) Present
Extended xAPIC Present
MONITOR/MWAIT Support Present
Thermal Monitor 2 Present
Enhanced SpeedStep Technology Present
L1 Context ID Not Present
Send Task Priority Messages Disabling Present
Processor Context ID Present
Direct Cache Access Not Present
TSC-deadline Timer Present
Performance/Debug Capability MSR Present
IA32 Debug Interface Support Present
64-Bit Debug Store Present
CPL Qualified Debug Store Present
[Extended Feature Flags]
64-bit Extensions Present
RDTSCP and TSC_AUX Support Present
1 GB large page support Present
No Execute Present
SYSCALL/SYSRET Support Present
Bit Manipulation Instructions Set 1 Present
Bit Manipulation Instructions Set 2 Present
Advanced Vector Extensions 2 (AVX2) Present
Advanced Vector Extensions 512 (AVX-512) Foundation Not Present
AVX-512 Prefetch Instructions Not Present
AVX-512 Exponential and Reciprocal Instructions Not Present
AVX-512 Conflict Detection Instructions Not Present
AVX-512 Doubleword and Quadword Instructions Not Present
AVX-512 Byte and Word Instructions Not Present
AVX-512 Vector Length Extensions Not Present
AVX-512 52-bit Integer FMA Instructions Not Present
Secure Hash Algorithm (SHA) Extensions Not Present
Software Guard Extensions (SGX) Support Present
Supervisor Mode Execution Protection (SMEP) Present
Supervisor Mode Access Prevention (SMAP) Present
Hardware Lock Elision (HLE) Not Present
Restricted Transactional Memory (RTM) Not Present
Memory Protection Extensions (MPX) Present
Read/Write FS/GS Base Instructions Present
Enhanced Performance String Instruction Present
INVPCID Instruction Present
RDSEED Instruction Present
Multi-precision Add Carry Instructions (ADX) Present
PCOMMIT Instructions Not Present
CLFLUSHOPT Instructions Present
CLWB Instructions Not Present
TSC_THREAD_OFFSET Present
Platform Quality of Service Monitoring (PQM) Not Present
Platform Quality of Service Enforcement (PQE) Not Present
FPU Data Pointer updated only on x87 Exceptions Not Present
Deprecated FPU CS and FPU DS Present
Intel Processor Trace Present
PREFETCHWT1 Instruction Not Present
AVX-512 Vector Bit Manipulation Instructions Not Present
AVX-512 Vector Bit Manipulation Instructions 2 Not Present
AVX-512 Galois Fields New Instructions Not Present
AVX-512 Vector AES Not Present
AVX-512 Vector Neural Network Instructions Not Present
AVX-512 Bit Algorithms Not Present
AVX-512 Carry-Less Multiplication Quadword (VPCLMULQDQ) Not Present
AVX-512 Vector POPCNT (VPOPCNTD/VPOPCNTQ) Not Present
User-Mode Instruction Prevention Not Present
Protection Keys for User-mode Pages Not Present
OS Enabled Protection Keys Not Present
Wait and Pause Enhancements (WAITPKG) Not Present
Total Memory Encryption Not Present
Key Locker Not Present
57-bit Linear Addresses, 5-level Paging Not Present
Read Processor ID Not Present
Cache Line Demote Not Present
MOVDIRI: Direct Stores Not Present
MOVDIR64B: Direct Stores Not Present
ENQCMD: Enqueue Stores Not Present
SGX Launch Configuration Present
Protection Keys for Supervisor-Mode Pages Not Present
Control-Flow Enforcement Technology (CET) Shadow Stack Not Present
AVX-512 4 x Vector Neural Network Instructions Word Variable Precision Not Present
AVX-512 4 x Fused Multiply Accumulation Packed Single Precision Not Present
Fast Short REP MOV Not Present
User Interrupts Not Present
AVX-512 VP2INTERSECT Support Not Present
AVX-512 FP16 Not Present
MD_CLEAR Support Present
Restricted Transactional Memory (RTM) Always Abort Not Present
SERIALIZE Not Present
Hybrid Processor Not Present
TSX Suspend Load Address Tracking Not Present
Platform Configuration (PCONFIG) Not Present
Indirect Branch Restricted Speculation (IBRS), Indirect Branch Predictor Barrier (IBPB) Present
Single Thread Indirect Branch Predictors (STIBP) Present
L1D_FLUSH Support Present
IA32_ARCH_CAPABILITIES MSR Present
IA32_CORE_CAPABILITIES MSR Not Present
Speculative Store Bypass Disable (SSBD) Present
Control-Flow Enforcement Technology (CET) Indirect Branch Tracking Not Present
Advanced Matrix Extensions (AMX) Tile Architecture Not Present
Advanced Matrix Extensions (AMX) bfloat16 Support Not Present
Advanced Matrix Extensions (AMX) 8-bit Integer Operations Not Present
AVX (VEX-encoded) Vector Neural Network Instructions Not Present
AVX-512 BFLOAT16 Instructions Not Present
Fast Zero-Length MOVSB Not Present
Fast Short STOSB Not Present
Fast Short CMPSB, SCASB Not Present
History Reset Not Present
Linear Address Masking Not Present
Protected Processor Inventory Number (IA32_PPIN) Support Not Present
[Vulnerability Mitigation Mechanisms]
Rogue Data Cache Load (RDCL) Not Susceptible
Speculative Store Bypass (SSB) Susceptible
Microarchitectural Data Sampling (MDS) Not Susceptible
MCE on modifying code page size without TLB invalidation Susceptible
Transactional Asynchronous Abort (TAA) Affected
Indirect Branch Restriction Speculation (IBRS) Supported
RSB Alternate Not Supported
L1D Flush on VM Entry Not Needed Supported
Energy Filtering Control Not Supported
RRSBA Alternate Prediction Behavior Not Supported
BHI_NO Branch Prediction Behavior Not Supported
[Enhanced Features]
Thermal Monitor 1: Supported, Enabled
Thermal Monitor 2: Supported, Enabled
Enhanced Intel SpeedStep (GV3): Supported, Enabled
Bi-directional PROCHOT#: Enabled
Extended Auto-HALT State C1E: Enabled
MLC Streamer Prefetcher Supported, Enabled
MLC Spatial Prefetcher Supported, Enabled
DCU Streamer Prefetcher Supported, Enabled
DCU IP Prefetcher Supported, Enabled
Intel Dynamic Acceleration (IDA) Technology: Not Supported
Intel Dynamic FSB Switching: Not Supported
Intel Turbo Boost Technology: Supported, Enabled
Programmable Ratio Limits: Supported, Disabled
Programmable TDC/TDP Limits: Supported, Disabled
Hardware Duty Cycling: Supported, Enabled
Intel Speed Select: Not Supported
[CPU SKU Features]
Display HD Audio: Supported
DMI x4 Width: Supported
DRAM ECC: Not Supported
VT-d: Supported
DMI in Gen2 Mode: Supported
PEG in Gen2 Mode: Supported
1N Mode DDR Timings: Supported
Camarillo (DTT) Device: Supported
2 DIMMs per Channel: Supported
X2APIC: Supported
Dual Memory Channel: Supported
Integrated GPU (IGD): Enabled
DDR Overclocking: Enabled
Overclocking by DSKU: Disabled
DDR3L: Supported
Maximum Memory Size per Channel: 64 GB (unlimited)
DDR Frequency Support (100 MHz RefClk) Supported
Overclocking: Disabled
Hyper-Threading (SMT): Supported
Additive Graphics: Supported
Additive Graphics: Enabled
PCIe Gen 3: Supported
DMI Gen 3: Supported
HDCP: Supported
DDR4: Supported
LPDDR3: Supported
BCLK OC Limit: 100 MHz
Maximum Supported LPDDR3 Frequency: 1067 MHz
Maximum Supported DDR4 Frequency: 1333 MHz
SVID Status: Enabled
[Voltage Regulator (SVID)]
VCC VR: Richtek (0x7), IMVP8
VR Thermal Sensor: Not Supported
[Memory Ranges]
Maximum Physical Address Size: 39-bit (512 GBytes)
Maximum Virtual Address Size: 48-bit (256 TBytes)
[MTRRs]
Range C0000000-100000000 (3072MB-4096MB) Type: Uncacheable (UC)
Range A0000000-C0000000 (2560MB-3072MB) Type: Uncacheable (UC)
Range 9C000000-A0000000 (2496MB-2560MB) Type: Uncacheable (UC)
Range 9B000000-9C000000 (2480MB-2496MB) Type: Uncacheable (UC)
Motherboard ---------------------------------------------------------------
[Computer]
Computer Brand Name: Unknown or Noname
[Motherboard]
Motherboard Model: SYWZ S210H Series
Motherboard Chipset: Intel HM370 (Cannon Lake-H)
Motherboard Slots: 4xPCI Express x1, 1xPCI Express x8, 1xPCI Express x16
PCI Express Version Supported: v3.0
USB Version Supported: v3.1
[BIOS]
BIOS Manufacturer: American Megatrends Inc.
BIOS Date: 01/26/2021
BIOS Version: 5.17
UEFI BIOS: Capable
Super-IO/LPC Chip: Nuvoton NCT6793D/NCT5563D
Trusted Platform Module (TPM) Chip: Not Found