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05-30-2010, 05:39 AM
(This post was last modified: 05-30-2010, 05:40 AM by Free Radical.)
(03-26-2010, 07:42 AM)Ace Wrote: @ free radical
hi we have successfully integrated an updated agesa and this allows any cpus upto 940BE to work and be detected properly. But any AM3 cpus with dual power plane still have incorrected multiplier detection and default to x4 multiplier.
we need to look into somehow overriding this detection bit somewhere in the bios, if you have any ideas?
Code:
;---------------------------------------------------------------------------------
;---------------------------------PCI ROM Header----------------------------------
;------------------------------ M2NPV-VM 1001 BIOS ---------------------------
ROM_SIZE_IN_BLOCK = 16 ; 1 means ROM size is 1 block (512 bytes)
ROM_SIZE_IN_BYTE = ROM_SIZE_IN_BLOCK * 512
VENDOR_ID equ 10DEh ; PCI Vendor ID (must match your ethernet vendor id)
; exp: 10DEh = ????
DEVICE_ID equ 0269h ; PCI Device ID (must match your ethernet devicie id)
; exp: 0269h = M2NPV-VM NIC
ROMStart:
db 0x055, 0x0AA ; ROM Header 55,AA -> Bootable rom
db (ROMEnd - ROMStart)/512 ; ROM Size in 512byte
jmp MAIN
db 0 ; checksum, to be filled in later
TIMES 18h-($-$$) DB 0 ; padding zeros to offset 18h
DW PCIHDR ; pointer to PCI Header
DW PNPHDR ; pointer to PnP Expansion Header
PCIHDR: DB 'PCIR' ; PCI data structure signature
DW VENDOR_ID ; vendor ID (must match real PCI device)
DW DEVICE_ID ; device ID (must match real PCI device)
DW 0 ; pointer to vital product data (0=none)
DW 24 ; PCI data structure length [B]
DB 0 ; PCI data structure revision (0=PCI 2.1)
DB 2,0,0 ; PCI device class code (2=network ctrlr,0=eth.)
DW ROM_SIZE_IN_BLOCK ; ROM size in 512B blocks
DW 0 ; revision level of code
DB 0 ; code type (0=x86 compitable)
DB 80h ; last image indicator
DW 0 ; reserved
PNPHDR: DB '$PnP' ; PnP data structure signature
DB 1 ; PnP structure revision
DB 2 ; PnP structure length (in 16B blocks)
DW 0 ; offset to next header (0-none)
DB 0 ; reserved
DB 33h ; PnP structure checksum
DD 0 ; device identifier
DW 0 ; pointer to manufacturer string
DW 0 ; pointer to productname string
DB 2,0,0 ; device class code (2=network ctrlr,0=eth.)
DB 64h ; device indicators (64h - shadowable,cacheable,not
; only for boot,IPL device)
DW 0 ; boot connection vector (0-none)
DW 0 ; disconnect vector (0-none)
DW 0 ; bootstrap entry vector (0-none)
DW 0 ; reserved
DW 0 ; static resource info vector (0-none)
MAIN:
pushad ;push all general registers
pushfd ;Push Flags Register onto the Stack (use 32)
;Set HTT Link Speed - M2NPV-VM 1001 BIOS
mov ebx,000000400h ; HTT multi:
; 0h-1x; 1h-res; 2h-2x; 3h-res;
; 4h-3x; 5h-4x; 6h-5x;
mov eax,08000C088h ; LDT0 Frequency Register
mov dx,0CF8h ; set port address
out dx,eax ; send address through the port
mov dx,0CFCh ; set port data
in eax,dx ; fetch data
and eax,0FFFFF8FFh ; set data in eax
or eax,ebx ; increase data
out dx,eax ; send data through port data
popfd ; Pop Stack into Eflags Register
popad ; Pop all general Register
retf ; Return Far from Procedure
times (ROM_SIZE_IN_BYTE-$) db 0 ; use 00h as the padding bytes until we
;reach the ROM size
; The last byte (512th) will be the patch_byte for the checksum
; patch_byte is calculated and automagically inserted below
PREV_CHKSUM = 0
repeat $
load CHKSUM byte from %-1
CHKSUM = (PREV_CHKSUM + CHKSUM) mod 0x100
PREV_CHKSUM = CHKSUM
end repeat
store byte (0x100 - CHKSUM) at ($-1) ; store the patch_byte
ROMEnd:Polygon from therebelshaven wrote me that PCI rom code for forcing the HTT multiplier to a set value (edit the HTT multiplier hex with the multiplier you want).
Compile it using fasm and replace your LAN boot rom.
This multiplier will take effect every time you start up your computer.
unfortunately in my case this had an undesirable effect of trouble shutting down or restarting and I had to shut down manually and start from a cold boot. ymmv
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