Everex XT5000T mod & _PSS Package Calculator/Generator for AMD K8 Processors

[jasmineaura]

Back..

since i left, I installed XP just to play with NHC. God, I must admit, ACPI object explorer is so much fun LOL!!! Quickly and easily I managed to be able to change (programmatically) the temperature trips points which trigger fan high<--->low levels (active cooling), the trip point that triggers throttling (passive cooling), and stopped shy of figuring out how the critical temperature is stored (seems to be directly stored in the EC, iirc), but that can wait. Also figured out how to directly use an ACPI method to immediately trigger fan low/high.. At this point, I think it would be trivial to do the same on Linux.. Always been able to trigger fan low/high through ACPI, in /proc/acpi (kernels ~2.6.2x) and currently through new sysfs (kernel 3.0). Win 7 x64, that's another story

Now the real issues:

1. These machines (big 17" desktop-replacement lappys) had serious heating issues, especially due to poor design of cooling system, and GPU+NB+CPU all sharing the same heatsink/cooling-pipe. Startup CPU voltages (per RMClock, CPU-z, HwiNfo32/64) are kinda on the high side, always having to use tools in different OS's is a pain, when it's really very easy to mod it in SSDT, and even adding the extra p-states. My only dilemma is, I want to extract the SSDT from the Amilo bios 1.1S BIOS to compare to the one on my Everex. Common DSDT codebase (in ACPI0.aml), with some (interesting) slight changes/additions in comparison to the (~3 months older) Everex 11D bios. Even from looking at the v0.4 of the mobo's schematic (XTB70), there are slight enhancements/additions marked specifically for the Amilo's. FSC put in a little more quality check, I guess. Hence why I really want to compare SSDTs, before going for a test run.
I can extract flashabl.rom (with phoenixtool195) and find reference strings in bioscod1.rom and bioscod4.rom for "SSDT", but I cannot disassemble them with iasl.. I realized they're lzint compressed.. Are they easily decompressable? or do they use decompression algorithm from DECOMPC0.rom?

Code:

C:\ACPI\amilobios\test\DUMP>..\..\..\iasl\iasl -d BIOSCOD1.ROM

Intel ACPI Component Architecture
ASL Optimizing Compiler version 20120215-32 [Feb 15 2012]
Copyright (c) 2000 - 2012 Intel Corporation

Loading Acpi table from file BIOSCOD1.ROM
TableHeader length [0x313100] greater than the input file size [0x5D4B]
Could not get table from the file

C:\ACPI\amilobios\test\DUMP>..\..\..\iasl\iasl -d BIOSCOD4.ROM

Intel ACPI Component Architecture
ASL Optimizing Compiler version 20120215-32 [Feb 15 2012]
Copyright (c) 2000 - 2012 Intel Corporation

Loading Acpi table from file BIOSCOD4.ROM
TableHeader length [0x313100] greater than the input file size [0xEF2B]
Could not get table from the file

Edit: phcomp is irrelevant, it only applies to the main bios rom (and seems only for thinkpads/some lenovos), not the bios modules' roms.

I need the SSDT table in AML/ASL, like the DSDT I got out of ACPI0.aml, to compare it as well.

Can you advise on how to proceed, and whether it's worth the effort?

--
Not as pressing (just for fun):
2. Discrete graphics NV Geforce go 7600 & Atheros AR5006EG always share the same (virtual) IRQ, either 19 or 20 (depending on OS). This has resulted in nothing but trouble for many users, including myself. WLAN loss after extended use or heavy wifi load, killing (hw accelerated?) mouse cursor, causing video driver crashes, etc. etc. etc. personally tested and tried on XP, Win7, and a myriad of Linux kernels, and drivers. Many past reports of Vista users as well. Seems that, even though MSI (Message Signal Interrupt) is listed as capability of both the NV & Atheros card (the latter also supporting MSI-X), but always use INTx emulation (per code in ACPI DSDT table). (See MSI-Howto below)
P.S. Switching from APIC to PIC which was an unlocked feature, has no effect, and disabling Lan bridge and MAC device doesn't help, both cards will always share the same IRQ.

From the MSI-Howto:

90 PCI Express endpoints uses INTx emulation (in-band messages) instead
91 of IRQ pin assertion. Using INTx emulation requires interrupt
92 sharing among devices connected to the same node (PCI bridge) while
93 MSI is unique (non-shared) and does not require BIOS configuration
94 support. As a result, the PCI Express technology requires MSI
95 support for better interrupt performance.

This is one thing I've investigated a bit, especially with a fact in mind that several users reported that the problem was solved by swapping the Atheros for an intel or broadcom card (no longer sharing IRQ, no more IRQ floods/races). Virtually, this really should've never even happened, since like 1999 lol.. Ironically, no ASPM issues.

[jasmineaura]

DSDT Update (from ACPI0.aml module) for Everex Bios 11D..

Most notable highlights of fixes:
1. Incorporated fixes from the DSDT of the Amilo Xa1526 Bios 11S, particularly to how resources are assigned or distributed.
2. Fixed a bunch of errors and warnings for both iasl (intel) and asl (microsoft) compilers to ensure better ACPI Spec compliancy

--

With the original DSDT from Bios 11D, Nvidia & Atheros card always shared IRQ19 (on XP and Linux) or IRQ20 (on Win7, and probably Vista). Linux (dmesg output) was a bit more descriptive as to the nature of this IRQ sharing:

Code:

[   14.757956] ACPI: PCI Interrupt Link [LK1E] enabled at IRQ 19
[   14.757983] ath5k 0000:03:00.0: PCI INT A -> Link[LK1E] -> GSI 19 (level, low) -> IRQ 19
[   14.757993] ath5k 0000:03:00.0: setting latency timer to 64
[..snip..]
[   21.602105] nvidia 0000:05:00.0: PCI INT A -> Link[LK1E] -> GSI 19 (level, low) -> IRQ 19
[   21.602119] nvidia 0000:05:00.0: setting latency timer to 64

As you can see, they were not only sharing same IRQ, but also shared the same (emulated) INTx endpoint: INT A at Link[LK1E].. I assume this is really bad, and probably the root cause of all the Wifi/Video issues in all OS's.

Now after the DSDT update:

Code:

[   12.628376] ACPI: PCI Interrupt Link [LK3E] enabled at IRQ 16
[   12.628405] ath5k 0000:03:00.0: PCI INT A -> Link[LK3E] -> GSI 16 (level, low) -> IRQ 16
[   12.628414] ath5k 0000:03:00.0: setting latency timer to 64
[..snip..]
[   19.817964] ACPI: PCI Interrupt Link [LK1E] enabled at IRQ 16
[   19.817974] nvidia 0000:05:00.0: PCI INT A -> Link[LK1E] -> GSI 16 (level, low) -> IRQ 16
[   19.817989] nvidia 0000:05:00.0: setting latency timer to 64

Now, not only do they use different INTx Links, with the Nvidia video using a higher one (LK1E) than the Atheros (LK3E), they were also pushed up to the first IRQ in the first APIC table (IRQ 16). I believe this would give a slightly higher priority to the PCI node (bridge) of the Nvidia/Atheros cards, and possibly a bit more for the Nvidia, which all looks great.

Before DSDT update (from `dmesg`) -- quite a mess:

Code:

[    0.313878] ACPI: PCI Interrupt Link [LNK1] (IRQs 5 7 10 11 14 15) *0, disabled.
[    0.316056] ACPI: PCI Interrupt Link [LNK2] (IRQs 5 7 *10 11 14 15)
[    0.316217] ACPI: PCI Interrupt Link [LNK3] (IRQs 5 7 10 *11 14 15)
[    0.316376] ACPI: PCI Interrupt Link [LNK4] (IRQs 5 7 10 11 14 15) *0, disabled.
[    0.316541] ACPI: PCI Interrupt Link [LK1E] (IRQs 16 17 18 19 20 21 22 23) *11
[    0.316700] ACPI: PCI Interrupt Link [LK2E] (IRQs 16 17 18 19 20 21 22 23) *0, disabled.
[    0.316862] ACPI: PCI Interrupt Link [LK3E] (IRQs 16 17 18 19 20 21 22 23) *0, disabled.
[    0.317023] ACPI: PCI Interrupt Link [LK4E] (IRQs 16 17 18 19 20 21 22 23) *0, disabled.
[    0.317182] ACPI: PCI Interrupt Link [LSMB] (IRQs 16 17 18 19 20 21 22 23) *10
[    0.317349] ACPI: PCI Interrupt Link [LPMU] (IRQs 16 17 18 19 20 21 22 23) *10
[    0.317510] ACPI: PCI Interrupt Link [LUS0] (IRQs 16 17 18 19 20 21 22 23) *11
[    0.317677] ACPI: PCI Interrupt Link [LUS2] (IRQs 16 17 18 19 20 21 22 23) *5
[    0.317843] ACPI: PCI Interrupt Link [LMAC] (IRQs 16 17 18 19 20 21 22 23) *15
[    0.318003] ACPI: PCI Interrupt Link [LAZA] (IRQs 16 17 18 19 20 21 22 23) *0, disabled.
[    0.320178] ACPI: PCI Interrupt Link [LPID] (IRQs 16 17 18 19 20 21 22 23) *0, disabled.
[    0.320347] ACPI: PCI Interrupt Link [LTID] (IRQs 16 17 18 19 20 21 22 23) *10
[    0.320511] ACPI: PCI Interrupt Link [LSI1] (IRQs 16 17 18 19 20 21 22 23) *0, disabled.

After:

Code:

[    0.320355] ACPI: PCI Interrupt Link [LNK1] (IRQs 5 7 10 11 14 15) *0, disabled.
[    0.320525] ACPI: PCI Interrupt Link [LNK2] (IRQs 5 7 *10 11 14 15)
[    0.320687] ACPI: PCI Interrupt Link [LNK3] (IRQs 5 7 10 *11 14 15)
[    0.320849] ACPI: PCI Interrupt Link [LNK4] (IRQs 5 7 10 11 14 15) *0, disabled.
[    0.321014] ACPI: PCI Interrupt Link [LK1E] (IRQs 16) *11
[    0.321178] ACPI: PCI Interrupt Link [LK2E] (IRQs 17) *0, disabled.
[    0.321338] ACPI: PCI Interrupt Link [LK3E] (IRQs 16) *0, disabled.
[    0.321496] ACPI: PCI Interrupt Link [LK4E] (IRQs 19) *0, disabled.
[    0.321655] ACPI: PCI Interrupt Link [LSMB] (IRQs 20) *10
[    0.321814] ACPI: PCI Interrupt Link [LPMU] (IRQs 21) *10
[    0.321972] ACPI: PCI Interrupt Link [LUS0] (IRQs 22) *11
[    0.324149] ACPI: PCI Interrupt Link [LUS2] (IRQs 23) *5
[    0.324314] ACPI: PCI Interrupt Link [LMAC] (IRQs 17) *15
[    0.324472] ACPI: PCI Interrupt Link [LAZA] (IRQs 19) *0, disabled.
[    0.324631] ACPI: PCI Interrupt Link [LPID] (IRQs 20) *0, disabled.
[    0.324800] ACPI: PCI Interrupt Link [LTID] (IRQs 20) *10
[    0.324963] ACPI: PCI Interrupt Link [LSI1] (IRQs 16) *0, disabled.

/proc/interrupts before:

Code:

CPU0       CPU1      
  0:        893      13879   IO-APIC-edge      timer
  1:          2       1692   IO-APIC-edge      i8042
  7:          1          0   IO-APIC-edge    
  8:          0          1   IO-APIC-edge      rtc0
  9:          0          0   IO-APIC-fasteoi   acpi
11:          0          8   IO-APIC-fasteoi   firewire_ohci
12:          3       1090   IO-APIC-edge      i8042
14:          3         70   IO-APIC-edge      pata_amd
15:          0          0   IO-APIC-edge      pata_amd
18:          1        233   IO-APIC-fasteoi   hda_intel
19:         13       2153   IO-APIC-fasteoi   ath, nvidia
20:          0          0   IO-APIC-fasteoi   ohci_hcd:usb2
21:        108      26416   IO-APIC-fasteoi   sata_nv
22:          0          0   IO-APIC-fasteoi   ehci_hcd:usb1
23:          1        208   IO-APIC-fasteoi   eth1

After:

Code:

CPU0       CPU1      
  0:        778       8788   IO-APIC-edge      timer
  1:          0        201   IO-APIC-edge      i8042
  7:          1          0   IO-APIC-edge    
  8:          0          1   IO-APIC-edge      rtc0
  9:          0          0   IO-APIC-fasteoi   acpi
11:          0          3   IO-APIC-fasteoi   firewire_ohci
12:          1        114   IO-APIC-edge      i8042
14:          1         72   IO-APIC-edge      pata_amd
15:          0          0   IO-APIC-edge      pata_amd
16:         15       1057   IO-APIC-fasteoi   ath, nvidia
17:          1        143   IO-APIC-fasteoi   eth1
19:          0        233   IO-APIC-fasteoi   hda_intel
20:        110      24689   IO-APIC-fasteoi   sata_nv
22:          0          0   IO-APIC-fasteoi   ohci_hcd:usb2
23:          0          0   IO-APIC-fasteoi   ehci_hcd:usb1

WinXP Before:


WinXP After:


--

Notes:
1. Compiling with iasl (intel ASL compiler) gives a better optimized AML binary. So that is preferred over asl.
2. To override/overload DSDT on Windows XP/Vista/7, use asl.exe from microsoft ASL compiler:

Code:

asl.exe /loadtable -v DSDT.aml

3. To override/overload DSDT on Linux, without having to recompile kernel, copy DSDT.aml to /boot/ (or /boot/ACPI/), and add the following line to grub2 bootloader, right above linux kernel boot line:

Code:

acpi /boot/ACPI/DSDT.aml

4. This DSDT asl code & aml binary are for overriding from OS or grub only. I do not recommend bundling this into ACPI0.aml module and repacking BIOS for flashing, as the original decompiled code of ACPI0.aml had a certain two fields that seemed to be static place holders that are auto-filled/replaced by BIOS with correct values (at boot). This is only a preliminary testing version, not for flashing. You've been warned


DSDT v0.1 Download (ASL Code and precompiled AML Binary):
http://www.mediafire.com/file/x1vcqzzhcy...T_v0.1.zip

Tested on Linux 3.x, Win XP SP3, Win 7 SP1.

--

In the pipeline / Work in Progress:
1. Better fan control in ACPI, or at least more sensible temperature trip points.
2. Updated SSDT --or incorporated in DSDT-- for a slightly lower startup CPU voltages).

[jasmineaura]

Updated SSDT: http://jas.gemnetworks.com/DSDT_PSS/SSDT.dsl
last updated: 2012-03-14 @5:00AM GMT

Main highlights:

1. Rewrite _PSS from scratch
2. Downvolts default CPU (Turion64 X2 TL-50) 800/1600MHz voltages from 0.800/1.075V to 0.725/0.925V, respectively.
3. Adds 3 intermediate P-states: 1000Mhz@0.775V, 1200Mhz@0.825V, 1400Mhz@0.875V.
4. Raises the available PStates in "throttle mode" to 800/1000/1200mhz instead of only 800mhz.

I wrote a _PSS package calculator (in javascript) for AMD K8 Processors, here:
http://jas.gemnetworks.com/DSDT_PSS/calc.html

Tested on Win 7.

Instructions:
1. Compile with Intel ASL: iasl SSDT.dsl
2. Override with MS ASL: asl /loadtable -v SSDT.aml
3. Reboot and enjoy lower power + lower temps + more refined p-state transitions

Todo: test on Linux

EDIT:
1. Updated the PSS package calculator to add "Advanced Defaults" section. Sometimes they can be different. for instance. AMD #32559 says the PLL Lock Time is always 2μs for NPT Family Fh processors, but my default BIOS SSDT used 3μs.

2. Updated SSDT accordingly, to use 3μs for PLL Lock Time as the default BIOS did, and also 40μs Voltage Stabilization Time (VST) as the default BIOS did. (I had "video driver stopped responding" problems with 2μs PLL LT & 100μs VST). Let's see how the latest changes fair in terms of stability.
P.S. The comments in the SSDT.dsl explains how to parse a pre-existing _PSS control field, such as one from your original BIOS using RWeverything tool -> ACPI -> SSDT.

[AHMED HOSSAM]

This is great work from you
I have nothing to say , all i can say that i wish you keep up this great work
however i don`t have INTEL CPU but i wish you make the same tool for INTEL as well ........ this will open the door for the SSDT modifications in the forum
I will make this a sticky thread and modify its subject .
Thank alot

[jasmineaura]

Even better undervolting, cooling and power savings yet running just as stable with p-states 1600MHz@0.900V, 1400@0.850,1200@0.800, 1000@0.750, 800@0.700, with VST = 40us & PLL Lock Time = 3us
This is from stock 1600MHz@1.075V & 800MHz@0.800V! Additional p-states (1400/1200/1000) work out of the box and natively used both on Win7 & XP without any additional tools like RMclock or whatever. Though, Win7 seems to have an affinity to 1400MHz or higher when switching from lowest multiplier (800MHz). However, when throttle is on (ex. with powermanager), and with the new DSDT, 800/1000/1200mhz are used, instead of only 800mhz prior

Edit: The above wasn't 100% stable after all.. After many many hours of regular work (despite prior stress testing), I had to up my values to the following to avoid sudden freeze or power-cuts:
1600MHz@0.925V, 1400@0.875, 1200@0.825, 1000@0.7625, 800@0.7125 (VST remains 40us & PLL Lock Time = 3us).
Since this is only a tad lower than the SSDT I posted in previous post, I'm leaving it untouched as a safe baseline for undervolting this laptop/CPU.

[jasmineaura]

Overriding SSDT table on Linux:

The grub method for overriding DSDT table described in previous post can be used to also load the SSDT table. Simply add a space and path to the SSDT.aml file:

Code:

acpi /boot/ACPI/DSDT.aml /boot/ACPI/SSDT.aml

Caveat for AMD K8 CPUs (may apply to others?)

If you added non-AMD-official FIDs (Frequency IDs), the kernel's powernow-k8 driver will trip out. To avoid that, either stick with the fids/frequencies officially/natively supported by AMD and adjust your _PSS Package size accordingly (ex. 0x2 if you have only 2 P-states), or install phc-k8:
For 3.0.x kernels, you'll need to remove the if block (3 lines) that checks for a 2.6 kernelrelease from Makefile. The module will compile and load fine (this is acknowledged by the authors).
Download phc-k8_v0.4.4.tar.gz and move it to "/usr/src/" directory, then:

Code:

# cd /usr/src
# tar xzf phc-k8_v0.4.4.tar.gz
# cd phc-k8_v0.4.4
# make dkms_install

Then edit the module's config file:

Code:

nano /etc/modprobe.d/phc-k8.conf

and uncomment this line:

Code:

options phc-k8 direct_transitions=1

Save, add your SSDT path as argument to "acpi" statement in grub.cfg & reboot..
Why reboot? You will not be able to remove the powernow-k8 module (at least not safely -- wouldn't recommend rmmod -f), which has to be unloaded for phc-k8 module to load (phc-k8 replaces powernow-k8). Besides, you need to load the SSDT from grub

Enjoy undervolted CPU, and the new FIDs

Before:

Code:

# dmesg | grep k8
[   14.148357] k8temp 0000:00:18.3: Temperature readouts might be wrong - check erratum #141
[   39.560941] powernow-k8: Found 1 AMD Turion(tm) 64 X2 Mobile Technology TL-50 (2 cpu cores) (version 2.20.00)
[   39.561034] powernow-k8: fid 0x8 (1600 MHz), vid 0x13
[   39.561038] powernow-k8: fid 0x0 (800 MHz), vid 0x1e

After:

Code:

# dmesg | grep k8
[   12.104945] k8temp 0000:00:18.3: Temperature readouts might be wrong - check erratum #141
[   39.404600] phc-k8: Found 1 AMD Turion(tm) 64 X2 Mobile Technology TL-50 (2 cpu cores) (version 2.20.00)
[   39.404700] phc-k8:    0 : fid 0x8 (1600 MHz), vid 0x19
[   39.404704] phc-k8:    2 : fid 0x6 (1400 MHz), vid 0x1b
[   39.404708] phc-k8:    4 : fid 0x4 (1200 MHz), vid 0x1d
[   39.404711] phc-k8:    6 : fid 0x2 (1000 MHz), vid 0x1f
[   39.404714] phc-k8:    8 : fid 0x0 (800 MHz), vid 0x23

[jasmineaura]

DSDT v0.2 Thermal / Fan Control Update

Download:
Code only: http://jas.gemnetworks.com/DSDT_PSS/DSDT_v0.2.dsl
Code & binary AML: http://jas.gemnetworks.com/DSDT_PSS/DSDT_v0.2.zip

Highlights of changes:
1. Much more sensible temperature trip points for Active Cooling, Passive Cooling, and Critical Temperature -- kick fan earlier.
2. Much more sensible Fan speeds and fan speed management, using preexisting hysteresis logic for Active Cooling Levels 0 and 1.
3. Implements additional fan speeds, including a quite-mode/ultra-low fan speed (for battery operation mode to conserve power), medium-high, and high (near full-blow) fan speed (for AC operation mode).
4. No longer are speeds always low & medium-low (both in Battery/AC mode). Now speeds for AC mode is: low -> medium-high -> high, and for Battery mode is: ultra-low -> low -> medium.
5. Adds the new speeds while maintaining existing ACPI Fan devices, by associating the higher two speeds in each power profile with each of the ACPI Fan devices, and statically using low/ultra-low speeds as default for AC/Battery profiles when both ACPI Fan devices are off. Fan off method is discovered (in comments in the code) but not used for safety, due to NVidia GPU heat issues in these laptops.
6. Fan speed transitions occur depending on current temperatures, even while the OS is booting -- provided enough stress on CPU (on all of Win XP, Win 7, and Linux). Now, ACPI/Thermal Zone temp never reaches 70C on any OS (with this DSDT + SSDT undervolt), regardless of how much stress you throw at the CPU, due to kicking the high fan speed (in AC operation) at 65C (drops back down to medium-high when CPU temp drops to 55C).
7. Accurate temp readings by fixing Celsius->Kelvin conversions.
8. Bunch of code optimizations and some minor code logic fixes.

--

Screenshots:

Original DSDT (v0.1 -- with minor changes incorporated from Bios 11S for Amilo Xa 1527):


After the DSDT update:

Win XP:


Win 7:


Linux (3.0.0):


--

Todo:
Drivers for direct user fan and throttling control on Windows/Linux

[jasmineaura]

vBios mod for Geforce Go 7600 in Everex XT5000T / Amilo Xa 1527 (same vBios md5sum)

This mod undervolts the 3D performance state in the G73M vBios to 1V (down from 1.1V)

Tools used:
1. phoenixtool195 to unpack/repack the bios
2. NiBiTor 6.04 (NVidia Bios Editor) to edit the OPROM1.rom module containing the vBios

Caveats:
Unsurprisingly, NiBiTor shows there are only two VIDs (Voltage IDs) available: "01" (1V) and "00" (1.1V). By default, "2D" and "Throttle" states both use 1V, and 3D uses 1.1V.
Unfortunately, one can't additional VIDs as the VID bitmask is "01".. Because, if you do a bitwise-AND anything with 1, you'll either get 1 or 0, so only 2 VIDs for this board (XTB70).. I've looked at it's schematic, page 22 iirc shows the voltage control logic, quite unflattering to say the least.
That said, I may have to resort to a hard-mod to undervolt the 3D state further, and the 2D/throttle states.

Screenshots to prove it:

Before the MOD:
After 17 minutes of EXTREME burning of GPU which results in it reaching a near-critical 88C before THRM temperature hits the 64C/65C mark and activates the "Active Cooling 0" level (which triggers the ultra high fan speed, per my last DSDT mods)


Once the high fan speed is triggered, temp drops to 85C (only -3C difference), and stays there. This is of course due to GPU sharing HSF with CPU..


After the MOD:
~7.5 minutes, ACPI THRM hits 64-65C, at the exact moment that the GPU is 78C, compared to 88C before. That's a 10C drop for only 0.1V !!!


10 minutes later (with high fan on), the GPU is snagged @ 77C, compared to 85C before.. 8C drop, still one heckuva deal for only 0.1V


Download Modded BIOS 1.1D for Everex XT5000T

[AHMED HOSSAM]

So, we can say that we have a complete MOD here for the Everex-XT5000T ( hidden menus , DSDT , SSDT and VBIOS ) , that`s perfect i hope this was done in high-end notebook like alienware or something like that
the new thermal zones and critical temps are perfect , also the VBIOS mod has greatly reduced heat issue in your notebook along with high speed fan on .
it will be perfect if the next step is inserting the new DSDT and may be the SSDT as well in the ROM file i knew that may be inserting SSDT is complex but i believe you can make it

[jasmineaura]

Details, pics and illustrated steps of GPU UNDERVOLT MOD for XT5000T/XTB70 Nvidia Geforce Go 7600 (G73M) here: http://hardforum.com/showthread.php?p=10...1038565164

Cheers