HP nr3610 Rugged: Need Help with old Laptop (Pentium M) upgrade

[yyy170]

Hi,

I recently updated some Software on my old Laptop, but the installed CPU was not up to the task. So I "quickly" replaced the CPU with a better one I had laying around.

---

Laptop Info:
Manufacturer:          General Dynamics / Itronix
Model:                     IX 260+ / Gobook III

OEM:                       HP Nr 3610
Original CPU :          Pentium M 735 SL7EP [FSB400]
Upgrade CPU :         Pentium M 780 [FSB533]

Status:
Laptop Boots, CPU is recognized, but is stuck at 100Mhz Bus Speed and 6x Multiplier [600Mhz].


I already flashed the most recent BIOS rom and the OEM HP BIOS rom. As this did not help, I used the AMI Bios tool and found out that the 6D8 Microcode was missing in both the Itronix and the HP BIOS. So I tried both with the added Microcode which did not work eighter.

The Itronix BIOS aswell as the HP BIOS does not offer any CPU configuration what so ever. They pretty much only show CPU model and speed.
(In my Case 600Mhz)


I'm pretty much out of Ideas now and thought you guys might be able to help (If this is even possible).
Or do I have to buy a 400Mhz CPU if I want to upgrade?

CPU-Z about CPU:



CPU-Z about Motherboard:


Thanks

[DeathBringer]

Download Coreinfo, run it command line and post results.

[yyy170]

Hi,

thanks for you quick reply.

The Output of Coreinfo:

Code:

       Intel(R) Pentium(R) M processor 2.26GHz
x86 Family 6 Model 13 Stepping 8, GenuineIntel
Microcode signature: 00000020
HTT           -    Hyperthreading enabled
HYPERVISOR    -    Hypervisor is present
VMX           -    Supports Intel hardware-assisted virtualization
SVM           -    Supports AMD hardware-assisted virtualization
X64           -    Supports 64-bit mode

SMX           -    Supports Intel trusted execution
SKINIT        -    Supports AMD SKINIT

NX            -    Supports no-execute page protection
SMEP          *    Supports Supervisor Mode Execution Prevention
SMAP          -    Supports Supervisor Mode Access Prevention
PAGE1GB       -    Supports 1 GB large pages
PAE           *    Supports > 32-bit physical addresses
PAT           *    Supports Page Attribute Table
PSE           *    Supports 4 MB pages
PSE36         -    Supports > 32-bit address 4 MB pages
PGE           *    Supports global bit in page tables
SS            *    Supports bus snooping for cache operations
VME           *    Supports Virtual-8086 mode
RDWRFSGSBASE    -    Supports direct GS/FS base access

FPU           *    Implements i387 floating point instructions
MMX           *    Supports MMX instruction set
MMXEXT        -    Implements AMD MMX extensions
3DNOW         -    Supports 3DNow! instructions
3DNOWEXT      -    Supports 3DNow! extension instructions
SSE           *    Supports Streaming SIMD Extensions
SSE2          *    Supports Streaming SIMD Extensions 2
SSE3          -    Supports Streaming SIMD Extensions 3
SSSE3         -    Supports Supplemental SIMD Extensions 3
SSE4a         -    Supports Streaming SIMDR Extensions 4a
SSE4.1        -    Supports Streaming SIMD Extensions 4.1
SSE4.2        -    Supports Streaming SIMD Extensions 4.2

AES           -    Supports AES extensions
AVX           -    Supports AVX intruction extensions
FMA           -    Supports FMA extensions using YMM state
MSR           *    Implements RDMSR/WRMSR instructions
MTRR          *    Supports Memory Type Range Registers
XSAVE         -    Supports XSAVE/XRSTOR instructions
OSXSAVE       -    Supports XSETBV/XGETBV instructions
RDRAND        -    Supports RDRAND instruction
RDSEED        -    Supports RDSEED instruction

CMOV          *    Supports CMOVcc instruction
CLFSH         *    Supports CLFLUSH instruction
CX8           *    Supports compare and exchange 8-byte instructions
CX16          -    Supports CMPXCHG16B instruction
BMI1          -    Supports bit manipulation extensions 1
BMI2          -    Supports bit manipulation extensions 2
ADX           -    Supports ADCX/ADOX instructions
DCA           -    Supports prefetch from memory-mapped device
F16C          -    Supports half-precision instruction
FXSR          *    Supports FXSAVE/FXSTOR instructions
FFXSR         -    Supports optimized FXSAVE/FSRSTOR instruction
MONITOR       -    Supports MONITOR and MWAIT instructions
MOVBE         -    Supports MOVBE instruction
ERMSB         -    Supports Enhanced REP MOVSB/STOSB
PCLMULDQ      -    Supports PCLMULDQ instruction
POPCNT        -    Supports POPCNT instruction
LZCNT         -    Supports LZCNT instruction
SEP           *    Supports fast system call instructions
LAHF-SAHF     -    Supports LAHF/SAHF instructions in 64-bit mode
HLE           *    Supports Hardware Lock Elision instructions
RTM           -    Supports Restricted Transactional Memory instructions

DE            *    Supports I/O breakpoints including CR4.DE
DTES64        -    Can write history of 64-bit branch addresses
DS            *    Implements memory-resident debug buffer
DS-CPL        -    Supports Debug Store feature with CPL
PCID          -    Supports PCIDs and settable CR4.PCIDE
INVPCID       -    Supports INVPCID instruction
PDCM          -    Supports Performance Capabilities MSR
RDTSCP        -    Supports RDTSCP instruction
TSC           *    Supports RDTSC instruction
TSC-DEADLINE    -    Local APIC supports one-shot deadline timer
TSC-INVARIANT    -    TSC runs at constant rate
xTPR          -    Supports disabling task priority messages

EIST          *    Supports Enhanced Intel Speedstep
ACPI          *    Implements MSR for power management
TM            *    Implements thermal monitor circuitry
TM2           *    Implements Thermal Monitor 2 control
APIC          *    Implements software-accessible local APIC
x2APIC        -    Supports x2APIC

CNXT-ID       -    L1 data cache mode adaptive or BIOS

MCE           *    Supports Machine Check, INT18 and CR4.MCE
MCA           *    Implements Machine Check Architecture
PBE           *    Supports use of FERR#/PBE# pin

PSN           -    Implements 96-bit processor serial number

PREFETCHW     -    Supports PREFETCHW instruction

Maximum implemented CPUID leaves: 00000002 (Basic), 80000008 (Extended).

Logical to Physical Processor Map:
*  Physical Processor 0

Logical Processor to Socket Map:
*  Socket 0

Logical Processor to NUMA Node Map:
*  NUMA Node 0

Logical Processor to Cache Map:

[DeathBringer]

OK. Run two of CPU-Z. In first should be opened CPU tab, in second - Bench. Run Bench CPU in second and check multiplier in first. Does it change?

[yyy170]

I already tried that myself, because i assumed that it showed the low multiplier due to Intel's speedstep.

But the Taskmanager shows 100% CPU load but CPU-Z shows unchanged Bus speed/ multiplier (and 600Mhz).

Btw.: I am currently running the original Itronix BIOS with edited CPU Microcode stuff. (In case that matters).

[DeathBringer]

So I tried both wiith the added Microcode wihich also did not work eighter.

Post your modded BIOS.

[yyy170]

Ok thank you for your help so far

Modded BIOS is attached.

[DeathBringer]

Your BIOS mod is correct. You should use it in the future.
855GM chipset doesn't support FSB=533Mhz. Use Pentium M with FSB=400Mhz

[yyy170]

Your BIOS mod is correct. You should use it in the future.
855GM chipset doesn't support FSB=533Mhz. Use Pentium M with FSB=400Mhz

Hm, thats quite unfortuned as it is a pain in the butt to take that thing apart.

I was hoping to get it working somehow, because some ads/ articles I found online actually mentioned this laptop with a 1.86Ghz CPU, which according to wikipedia is a 533FSB Dothan CPU.

But once again thanks for your fast help and your helpful conclusion.

I'll try to get a Pentium M 755 or 765 FSB 400 CPU off ebay now.

[DeathBringer]

You can try to disable speedstep by RMClock